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French startup Texplained Sarl (Sophia Antipolis, France) has opened a laboratory for analysis of IC security and to help companies and governments protect against counterfeiting, IP theft and security breaches.

Texplained uses reverse engineering techniques to determine key IC pin-out from PCB layout and then plasma etching, chemical mechanical polishing and wet chemical etching to delayer ICs. Each interconnect layer and the active layer is then imaged with a scanning election microscope. Texplained’s final contribution is proprietary reverse-engineering software called ARES that can be used to analyse the images of the circuits on each layer and ultimately to extract a netlist of the device.