I. DIGITAL ELECTRONICS BASICS FOR REVERSE ENGINEERING

600,00 €

DIGITAL ELECTRONICS BASICS FOR REVERSE ENGINEERING

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I. DIGITAL ELECTRONICS BASICS FOR REVERSE ENGINEERING

I.1. Integrated Circuits

This module provides a structured learning path through the fundamentals of integrated circuits. The key topics covered include:

Integrated Circuits and Packaging

  • Role of ICs in systems
  • Packaging types
  • Chip-level analysis

Physical Chip Access

  • Access techniques to IC die
  • Smart card approaches
  • Package styles
  • Safety precautions

IC Architecture

  • Core components (core, peripherals, memory)
  • Layered structure (interconnect, active)

Transistor Fundamentals

  • NMOS/PMOS structure and switching
  • Technology nodes

Logic Gate Construction

  • Transistor combinations for logic gates
  • Resistive load vs. CMOS designs

Layout to Schematic

  • Interpreting IC layouts
  • Deciphering circuit schematics

Transistor-Level Exploitation

  • Hardware-based attack techniques
  • Side-channel and fault injection

I.2. Digital Electronics

This module explores the core concepts of digital electronics, progressing from fundamental logic gates to sequential circuits and potential hardware vulnerabilities. The following chapter outlines provide a concise overview of the key topics covered:

Combinatorial Logic Fundamentals

  • Introduction to logic gates and their operation
  • Truth tables: construction and use in reverse engineering
  • Inverter, NAND, NOR gates
  • Layout representation

Combinatorial Logic Analysis

  • Deriving truth tables from transistor circuits
  • Boolean algebra and equations
  • Analyzing circuits with multiple transistors
  • Simplifying logic expressions

Advanced Combinatorial Logic

  • Efficient equation derivation techniques
  • Pull-up/pull-down networks
  • Series/parallel to AND/OR translation
  • Propagation delay

Sequential Logic and Latches

  • Need for memory in digital circuits
  • Inverter ring and transmission gate
  • Latch operation and timing.

Flip-Flops and Registers

  • Flip-flop implementation and edge-triggered operation
  • Registers
  • Register-combinatorial logic architecture

Timing and Clock Glitching

  • Critical path
  • Clock glitching fault injection

I.3. Memories

This module focuses on memory architectures and analysis within integrated circuits. It covers address decoding, memory types, and techniques for both analyzing and securing memory structures.

Memory Architecture

  • Memory block diagram (storage array, decoders)
  • Row and column decoder functions

Row Decoder

  • Row decoder operation and layout
  • Address decoding and word line selection
  • Scrambling detection

Column Decoder

  • Column decoder as a multiplexer
  • Implementation and scrambling

Memory Types

  • RAM (SRAM, DRAM) and non-volatile memory (ROM, Flash)

RAM Details

  • DRAM and SRAM operation
  • SRAM analysis techniques

ROM Details

  • ROM architecture and reading
  • NAND ROM

Flash Memory

  • Flash cell structure and operation
  • Charge pump

Flash Analysis

  • AFM and SEM for flash memory analysis

Charge Pump and Security

  • Charge pump function
  • Fault injection

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