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Hardware security lab

TEXPLAINED IS HIRING

FAILURE ANALYSIS ENGINEER

*****

COMPANY

Created in 2013 and based in Sophia Antipolis, Texplained is the reference in Integrated Circuit Reverse Engineering and Analysis. Our company offers a broad range of services and products to extract data from Integrated Circuits.

Equipped with cutting-edge equipments (SEMs, FIB, Plasma Etcher, etc.) and proprietary tools dedicated to IC Reverse Engineering, analysis and data extraction, we accompany chip makers, governments and other OEMs, in their mission to explore the hardware, look for Backdoors and recover embedded data as well as digital evidence from encrypted devices.

In the context of our development, we have several open positions.

In particular, we are looking for a Failure Analysis Engineer who’s mission will mainly consist in preparing, imaging and modifying Integrated Circuits in the context of their reverse engineering.

 

MISSION

MISSION

In the context of a partnership between CEA and Texplained, a job of Failure Analysis (FA) Engineer is open. The main mission will consist in preparing samples in Texplained FA Lab, and then operate the high resolution imagery of each layer of the chips with a SEM (Scanning Electron Microscope). The end goal being the reverse engineering of the prepared and imaged targets.
 
Your everyday work will consist in creating « recipes » which combine techniques and tools aiming at exposing each metal layer of the chips, in the most clean and even way.
To do so, you will have access to:
  • All the chemicals used for wet etching purpose
  • Polishers for mechanical etching
  • Plasma etcher for dry etching and RIE process
  • Broad Beam for wide etching with ions
  • Sputter coater for metal deposition
in order to be able to depackage and then delayer Integrated Circuits of different types of architectures and physical constructions (aggressive tech nodes, smart cards, etc.).
You will then inspect the prepared chips with our SEMs, and finally scan the entire layers to obtain images of the full IC’s internal construction, with the best possible contrast.
 
A training will be given to you in order for you to learn how to modify the internal structures of chips with a FIB (Focused Ion Beam), in the context of the data extraction and/or hardware security analysis for anti-piracy purposes.
 
If successful, this contract aims at being transformed into a permanent one.
 

PROFILE

You are graduated in microelectronics (design and IC technology, semiconductor physics) and have a concrete experience with the equipments and methods used in the Failure Analysis field. 
You are creative, autonomous, well organized and very rigorous, which are mandatory sift skills to succeed in the job.
You have already worked in an ITSEF (IT Security Evaluation Facility) or in a Failure Analysis Lab dedicated to semiconductor.
Your technical knowledge covers:
  • The ICs’ physical architecture
  • The sample preparation in the context of FA and/or Hardware Reverse Engineering

If you are interested, you are invited to send your application right now to: opportunity@texplained.com

Location: Sophia Antipolis

Application - Failure Analysis Engineer

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